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Hardware in the Loop Simulation of MILP Algorithm based Railway Traffic Re-scheduling during Disturbances

Endra Joelianto, Aan Setiawan, Diah Chaerani

Abstract


The paper considers hardware in the loop simulation (HILS) of railway traffic re-scheduling during disturbances. Intensity and characteristic of traffic in the systems are high and various that cause the systems are sensitive to disturbances. Minimization the effects of disturbances to the schedule of the railway systems is studied in this paper by using optimization approach. The traffic re-scheduling during disturbances is formulated as a mixed integer linear programming (MILP) which is then solved by using Branch and Bound algorithm. The HILS apparatus is then set-up involving hardware and software to verify the performance results.

Keywords


Train Traffic; Railway Scheduling; Timetabling; N-Tracks; Disturbance Management; MILP; HILS; PLC; OPC

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